I've modeled the equivalent model for the TPS54350 shown on page 14, Figure 23, using component values from application circuit on page 15, Figure 24.
I'm feeling quite rusty on my controls knowledge so I've been playing around with this model and have only come out more confused than I was to begin with.
LTspice schematic of the control loop model:
From page 14:
Plotting b/c shows the small-signal response of the power stage. Plotting c/a shows the small-signal response of the frequency compensation. Plotting a/b shows the small-signal response of the overall loop.
Frequency response of the control loop model:
Expected loop response from TPS54350 datasheet:
For the sake of sanity checking myself on my definitions of crossover frequency and phase margin am I correct in saying that the overall loop response has a crossover frequency of 27 kHz and a phase margin of 215° (34 - (-180) = 215)? Which would mean the overall loop response is very stable as the PM is >45°?
I don't understand why the power stage and frequency compensation responses are increasing in gain. I was under the assumption that the overall loop gain would be the sum of the frequency comp gain and power stage gain which is clearly not the case here. Is that even a true statement?
In an effort to further understand the compensation circuitry I removed it all from the circuit and ran the simulation again.
SPICE schematic of the control loop model with compensation circuitry removed:
Frequency response of the control loop with no compensation:
If I am understanding it correctly, the phase margin is the distance from -180° at 0dB. This means that without compensation the overall loop still has a PM of 106° and is therefore considered stable? Also, how is it possible that the frequency compensation response didn't change at all? In my mind it makes more sense that c/b would be the frequency compensation response and a/c the power stage response, why isn't that the case?